# SMD-DC Series Medium & High Voltage SMD Ceramic Capacitors

> Resin-molded SMD ceramic capacitors for high-voltage DC circuits. Rated 1,000, 2,000 and 3,000 VDC, 10–4,700 pF, in 1815 and 2522 formats.

- Series code: SMD-DC
- Product line: [Ceramic capacitors](https://www.songtian-ste.com/en/products/ceramic-capacitors/) › SMD safety and high-voltage capacitors
- Also listed in: [SMD components](https://www.songtian-ste.com/en/products/smd/)
- Part numbers and datasheets on request
- Page: https://www.songtian-ste.com/en/products/ceramic-capacitors/smd-dc/
- Chinese version: https://www.songtian-ste.com/zh/products/ceramic-capacitors/smd-dc/
- [Ask AI about this series](https://www.songtian-ste.com/en/products/ceramic-capacitors/smd-dc/?ask=Help%20me%20choose%20a%20part%20from%20the%20STE%20SMD-DC%20series.)

## Key specifications

| Parameter | Value |
| --- | --- |
| Rated voltage | 1 / 2 / 3 kVDC |
| Capacitance | 10–4,700 pF |
| Package format | 1815 / 2522 |
| Dielectrics | SL · Y5P · Y5U · Y5V |

## Engineering details

### Overview

Resin-molded SMD ceramic capacitors for 1–3 kVDC circuits. Rated 1,000, 2,000 or 3,000 VDC, 10–4,700 pF, in 1815 and 2522 formats with 2.2–2.38 mm nominal body height. Dielectrics SL, Y5P, Y5U and Y5V; MSL 3, tape and reel. DC components, not X/Y safety capacitors.

#### Series features

- Rated voltage 1,000, 2,000 or 3,000 VDC
- Nominal body height 2.2–2.38 mm; flat terminals, no leads through the board
- Withstand voltage and insulation resistance specified per dielectric
- 3,000 pcs per reel, MSL 3, reflow solderable
- Flame-retardant epoxy molding to UL 94 V-0

#### Typical applications

- High-voltage DC filtering and coupling
- D-A isolation and noise reduction in transformerless circuits
- Input and output filtering in compact power converters
- Low-capacitance snubber and spike-suppression networks; validate pulse energy and self-heating

### Specifications

|   |   |
| --- | --- |
| Rated voltage | 1,000 · 2,000 · 3,000 VDC |
| Capacitance range | 10–4,700 pF, depending on package |
| Package formats | 1815 · 2522 (STE format codes, not EIA chip sizes) |
| Dielectrics | SL · Y5P · Y5U · Y5V, depending on package |
| Capacitance tolerance | K ±10% · M ±20% |
| Dissipation factor | SL ≤0.1% · Y5P/Y5U/Y5V ≤2.5% |
| Withstand voltage, 1 kV, SL | 1.5 × UR · 1–5 s |
| Withstand voltage, 1 kV, Class 2 | 2 × UR · 1–5 s |
| Withstand voltage, 2 kV and 3 kV | 1.5 × UR + 500 V · 1–5 s |
| Insulation resistance | SL >10,000 MΩ · Class 2 >4,000 MΩ |
| IR test condition | 500 VDC · 60 ±5 s · charge/discharge current ≤50 mA |
| Moisture sensitivity | MSL 3 |
| Reel quantity | 3,000 pcs |
| Endurance test | 1.5 × UR · 105 ±2 °C · 1,000 h |
| Flammability | Epoxy molding to UL 94 V-0 |

### Variants

Ranges by dielectric, package and lead style within this series.

| Variant | Body dimensions | Capacitance | Dielectric | Lead / land pattern | Notes |
| --- | --- | --- | --- | --- | --- |
| 1815 | L 4.5 ±0.3 · W 3.9 ±0.3 · H 2.2 ±0.3 mm | 10–2,200 pF | SL · Y5P · Y5U · Y5V | a ≥4.0 · b 2.2 ±0.1 · c 3.2 ±0.2 mm | Smallest format; the only format with SL values of 10–68 pF. |
| 2522 | L 6.0 ±0.1 · W 5.55 ±0.1 · H 2.38 ±0.1 mm | 390–4,700 pF | Y5P · Y5U · Y5V | a ≥5.5 · b 2.2 ±0.1 · c 3.6 ±0.2 mm | Higher-capacitance format up to 4.7 nF. |

### Selection guide

Choose the voltage code and dielectric before optimizing capacitance. The series is a high-voltage DC component, not an IEC 60384-14 safety capacitor. Package codes are STE format names, not EIA chip sizes.

1. **Define the actual DC stress**
   Add DC bias, ripple peak, switching overshoot, start-up and fault transients. Keep the complete waveform within the rated voltage. The withstand-test voltage is not a continuous working rating.
2. **Choose voltage code N, R or S**
   N = 1 kVDC, R = 2 kVDC, S = 3 kVDC. Not all capacitance, dielectric and voltage combinations are available.
3. **Choose the dielectric for the required stability**
   SL gives the lowest dissipation factor and the highest insulation resistance at low capacitance. Y5P, Y5U and Y5V extend capacitance, with increasingly wide capacitance change over temperature.
4. **Choose the package**
   1815 covers 10–2,200 pF and includes SL; 2522 covers 390–4,700 pF. Verify body, land span, PCB creepage and clearance for the applied voltage and environment.
5. **Validate circuit and assembly stresses**
   Check ripple and self-heating, pulse energy, board flex, contamination and coating. Apply MSL 3, reflow and post-solder handling controls on the production assembly.

### Approvals & reliability

#### Reliability tests

Test conditions and limits by dielectric. Test voltages and temperatures are test conditions, not continuous operating ratings.

| Test | Condition | Acceptance |
| --- | --- | --- |
| Damp heat, steady state | 40 ±2 °C · 90–95% RH · 500 +24/−0 h | No visible damage · capacitance and DF within dielectric limits · IR: SL >5,000 MΩ, Class 2 >2,000 MΩ |
| Damp heat with load | 40 ±2 °C · 90–95% RH · rated voltage · 500 +24/−0 h | No visible damage · capacitance, DF and IR within dielectric limits |
| Endurance | 105 ±2 °C · 1.5 × rated voltage · 1,000 +48/−0 h | No visible damage · ΔC: SL ≤±5%, Y5P/Y5U ≤±20%, Y5V ≤±30% · DF and IR within limits after test |
| Temperature cycling | −25 °C ↔ +105 °C · five cycles, after preconditioning at 85 °C | No visible damage; marking legible after recovery |
| Resistance to soldering heat | Preheat 150–180 °C, 90 ±30 s · reflow 230–260 °C, 60 ±15 s · four cycles | No visible damage · capacitance and IR within dielectric limits · no breakdown or flashover |
| Mechanical robustness | Vibration 10–55 Hz, 1.5 mm · shock 490 m/s², 11 ms · terminal shear 10 N | No visible damage or terminal displacement; capacitance change within the specified limit |

### Design notes

#### Not a safety capacitor

This DC-rated series is not an X/Y safety capacitor. Its rated or withstand voltage does not imply line-to-earth, line-to-line or reinforced-insulation approval. Where the equipment standard requires a safety capacitor, select a certified X/Y series.

#### Voltage waveform and derating

Keep DC bias plus ripple and all repetitive or abnormal peaks within the rated voltage. Set derating from the equipment environment, expected lifetime, contamination and transient spectrum. A 1–5 s withstand test is not a design margin.

#### Reflow and moisture handling

MSL 3. Store at ≤30 °C / 60% RH, use within six months and solder within 168 h after opening. If storage time or floor life is exceeded, bake at 60 °C for 168 h. Reference reflow window: 230–260 °C for 10–30 s, preheat 170 °C max.

#### Self-heating and pulse use

Measure the surface temperature under the real voltage waveform, with nearby heat-generating parts in place. For the applicable Class 2 dielectrics, limit temperature rise from dielectric loss to 20 °C at 25 °C ambient. Pulse-current and energy ratings are not specified for the series; validate snubber or resonant use in the application.

#### PCB layout and mechanical stress

Use the land dimensions of the selected package and verify creepage and clearance for the applied voltage. Avoid board flex, terminal misalignment, body movement after soldering and impact; they can crack the ceramic or the termination.

#### Cleaning, coating and fail-safe design

Validate cleaning agents, adhesives, coatings and potting resins on the actual assembly; solvents or thermal-expansion mismatch can damage the epoxy or the ceramic. Provide fusing or another protective function where a shorted capacitor could cause electric shock, fire or smoke.

## Datasheets & approval documents

- [Technical document: DC series SMD molded medium/high-voltage ceramic capacitors, package 1815 (2024-11)](https://www.songtian-ste.com/documents/source-cn/smd/%E5%A1%91%E5%B0%81%E8%B4%B4%E7%89%87%E4%B8%AD%E9%AB%98%E5%8E%8B%E9%99%B6%E7%93%B7%E7%94%B5%E5%AE%B9%E5%99%A8%EF%BC%88DC%E7%B3%BB%E5%88%97%201815%EF%BC%89%202024.11.pdf) — PDF · Chinese · 2024-11 · 521 KB
- [Technical document: DC series SMD molded medium/high-voltage ceramic capacitors, package 2522 (2024-11)](https://www.songtian-ste.com/documents/source-cn/smd/%E5%A1%91%E5%B0%81%E8%B4%B4%E7%89%87%E4%B8%AD%E9%AB%98%E5%8E%8B%E9%99%B6%E7%93%B7%E7%94%B5%E5%AE%B9%E5%99%A8%EF%BC%88DC%E7%B3%BB%E5%88%97%202522%EF%BC%89%202024.11.pdf) — PDF · Chinese · 2024-11 · 519 KB

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